A typical dynamic random access memory (DRAM) comprises a plurality of storage cells that each include a data storage capacitor and an access transistor. Such structures are used as semiconductor memories.
DRAMs are generally implemented with one of two storage cell configurations. The first storage cell configuration comprises a "multilayer" capacitor structure formed on a semiconductor substrate. The other storage cell configuration comprises a "trench" capacitor structure formed on a semiconductor substrate. Since the "trench" capacitor structure allows for the highest density of memory cells per given area of semiconductor substrate, a preference for trench DRAM cells in various micro-electronic devices has been increasing steadily in recent years.
A typical capacitance storage trench for a DRAM cell comprises a cylindrical-shaped trench that is etched into the surface of a semiconductor substrate. Such a trench generally includes one sidewall that extends at a 90.degree. angle as measured from the surface of the substrate and a bottom wall that extends parallel relative to the surface of the substrate. The sidewall of the trench, which is formed by the semiconductor substrate, operates as one of two plates of a capacitor. The sidewall of the trench is coated with a thin dielectric layer that functions as the dielectric medium of the capacitor. Polysilicon fills the trench and operates as the other plate of the capacitor.
Even though trench DRAM cells such as the one described above, lend themselves to high density integration, further increases in density are being sought. Such increases in density require reductions in the physical size of the memory cell which results in lower volt supply values. When lower volt supply values are used the value of the capacitance storage trench must be increased in order to maintain the capacitance of the memory cell.
As is well known in the art, in order to increase the capacitance of a capacitor, the area of the plates must be increased (assuming the thickness of the dielectric medium remains constant). This is presently accomplished in a capacitance storage trench by increasing the depth of the trench. Existing techniques for increasing the depth of the trench, however, are not capable of maintaining a 90.degree. (vertical) trench sidewall angle as the depth of the trench is increased. Maintaining a 90.degree. trench sidewall angle along the entire depth of the trench maximizes the area between the plates. Thus, for any given diameter trench, the depth of the trench is always limited to some value. If the trench depth is increased beyond this value, the gain in surface area between the plates becomes nominal because the trench sidewall angle beyond this trench depth becomes substantially less than 90.degree.. Moreover, even if the depth of trenches can be successfully increased, as memory devices become denser, the depth of the trenches will eventually be limited.
Attempts have been made in the prior art to address the need for trench DRAM cells with increased capacitance. In U.S. Pat. No. 5,028,980 entitled TRENCH CAPACITOR WITH EXPANDED AREA, issued on Jul. 2, 1991 to Teng, there is disclosed a trench capacitor for a DRAM cell with an increased capacitance. The trench capacitor consists of a tubular-shaped trench formed in the semiconductor substrate. This type of trench structure produces a centrally located post of semiconductor material. The sidewall surface of the trench which includes the outer surface of the centrally located post, receives a thin layer of dielectric material. The trench is then filled with polysilicon. The outer surface of the centrally located post increases the overall surface area of the trench and thus, provides an increase in capacitance for the DRAM.
Although the trench DRAM cell of U.S. Pat. No. 5,028,980 provides a significant increase in capacitance, there still exists a need for trench DRAM cells with even greater increases in capacitance. This need is fueled by the ever increasing density of dynamic RAMs in today's micro-electronic devices.
It is, therefore, an object of the present invention to provide a capacitance storage trench for a DRAM cell, with an expanded sidewall area that substantially increases the storage capacitance of the DRAM cell.
It is a further object of the present invention to provide a method for making a capacitance storage trench with an expanded sidewall area that is easily integrated into a trench DRAM process.